Wafer-level testing includes testing dice on a wafer. In this specification, “dice” is used as the plural of “die”. Since dice are fragile, it is preferable not to touch any die more than once during test. However, since dice are typically patterned on a circular wafer, testing any set of dice may involve touching several dice more than once. Furthermore, a device that touches the dice may have to partially step (walk) off of the wafer for all dice to be touched. The ratio of actual touchdowns to theoretically necessary touchdowns is called touchdown efficiency.
There is a certain amount of test circuitry that needs to have a good electrical path (e.g., low loss, low inductance, and low crosstalk) to test a die. This circuitry often takes-up several square inches of a test board per die being tested. Typically, a good electrical path is obtained by implementing a very short electrical path on the test board that is used to perform wafer-level testing.
To address the touchdown efficiency problem, it is helpful to test dice in a tight group. To address the test circuitry problem, it is helpful to test dice that are spread out on the wafer, so that one die's test circuitry does not electrically or mechanically interfere with test circuitry of an adjacent die. These two competing requirements affect the ability to perform parallel testing at the wafer level.